Expensive models and experiments
PIML can reduce repeated simulation or experimental cost while retaining the governing knowledge used in Electronics and Communication Engineering (VLSI Design & Technology).
Engineering Research Community
Electronics and Communication Engineering (VLSI Design & Technology) & Physics-Informed Machine Learning
Physics-grounded modelling, learning and validation for Electronics and Communication Engineering (VLSI Design & Technology)
Electronics and Communication Engineering (VLSI Design & Technology) & Physics-Informed Machine Learning
This specialization focuses on semiconductor devices, digital/analog VLSI, EDA, fabrication technology, verification, testing, packaging and hardware architectures. PIML can accelerate device/process/circuit models and improve physically grounded design optimization.
This page presents ten focused research areas, degree-level project pathways, selected publications and direct support through the PIMLS biweekly members meeting.
This Electronics and Communication Engineering (VLSI Design & Technology) guide covers Physics-Informed Neural Networks (PINNs), physics-guided machine learning, scientific machine learning, neural operators, hybrid models and engineering digital twins. Explore the research and project pathways below, then join the Physics-Informed Machine Learning Society to connect with the international PIMLS community.
The central ideaEstablished Electronics and Communication Engineering (VLSI Design & Technology) knowledge + measurements and simulation + machine learning
10focused research areas
3academic project pathways
6selected publications
Biweeklymember research meeting
Why this combination matters
Why Electronics and Communication Engineering (VLSI Design & Technology) Needs Physics-Informed Learning
Use available scientific knowledge to make limited data more useful, transparent and testable.
Incomplete engineering models
Learn uncertain parameters, closures or discrepancies around an inspectable mechanistic foundation.
Transfer across conditions
Test whether structured models generalize across geometries, materials, assets, operating regimes or sites.
Trustworthy evidence
Use physical residuals, independent measurements, uncertainty and conventional engineering baselines before deployment.
Ten focused directions
Major Electronics and Communication Engineering (VLSI Design & Technology) PIML Research Areas
Each card connects a meaningful Electronics and Communication Engineering (VLSI Design & Technology) question with suitable scientific knowledge, modelling choices and evidence needed to test it.
01
Device Compact Modelling
SPICE needs fast transistor models. PIML opportunities: Learn residuals across geometry, bias, temperature and process corners.
Model and evidenceGoverning equations, calibrated measurements and held-out operating conditions
02
Process Technology Modelling
Fabrication conditions determine device structure. PIML opportunities: Build mechanism-guided process–property models with lot holdouts.
Model and evidenceMechanistic and data-only baselines, uncertainty and independent validation
03
Analog Circuit Surrogates
Sizing requires repeated nonlinear simulation. PIML opportunities: Use topology-aware models with corner verification.
Model and evidenceGeometry, material or system parameters, sensor data and physical residuals
04
Digital Timing Analysis
Paths obey graph and cell-delay structure. PIML opportunities: Predict timing with worst-case signoff checks.
Model and evidenceGoverning equations, calibrated measurements and held-out operating conditions
05
Power Estimation
Activity and circuits determine dynamic/leakage power. PIML opportunities: Use circuit/accounting constraints across workloads.
Model and evidenceMechanistic and data-only baselines, uncertainty and independent validation
06
Thermal Analysis
Power becomes spatial heat. PIML opportunities: Learn layout/package heat operators with sensor validation.
Model and evidenceGeometry, material or system parameters, sensor data and physical residuals
07
Power-Delivery Integrity
Current and interconnect create voltage drop. PIML opportunities: Use network/field surrogates with electromigration limits.
Model and evidenceGoverning equations, calibrated measurements and held-out operating conditions
08
Signal Integrity
Interconnect causes delay, coupling and reflection. PIML opportunities: Combine transmission/EM physics with layouts.
Model and evidenceMechanistic and data-only baselines, uncertainty and independent validation
09
Placement and Routing
Geometric decisions affect congestion and timing. PIML opportunities: Optimize under hard design rules and signoff verification.
Model and evidenceGeometry, material or system parameters, sensor data and physical residuals
10
Yield and Variation
Process distributions affect functional margins. PIML opportunities: Use hierarchical models across wafers and lots.
Model and evidenceGoverning equations, calibrated measurements and held-out operating conditions
Choose the right research depth
Projects for Every Academic Stage
Start with a scope that matches your time, mathematical background, experimental access and expected research contribution.
Project pathway 1
B.E./B.Tech
Learn the foundations with a bounded, measurable system.
- transistor compact residual model
- layout thermal operator
- timing-graph learner
- process-corner analog surrogate
Expected outcome
A reproducible implementation, clear baselines, a manageable dataset and physically meaningful validation.
Project pathway 2
M.Tech
Combine an engineering model, substantial data and rigorous comparison.
- multiphysics chip digital twin
- variation-aware yield model
- physics-guided placement optimization
- silicon-validated aging predictor
Expected outcome
A thesis-quality study with held-out regimes, mechanistic and data-only baselines, ablation and uncertainty.
Project pathway 3
Ph.D.
Address a publishable methodological, multiscale or deployment research gap.
- foundation models for electronic design automation
- certifiable learned signoff acceleration
- chip–package–system physical twins
- secure collaborative PIML for semiconductor manufacturing
Expected outcome
New methodology or validated engineering insight, multi-regime evidence, reproducible software and journal publications.
From idea to evidence
A Strong PIML Project Workflow
01
Define
Choose one Electronics and Communication Engineering (VLSI Design & Technology) question and a measurable engineering output.
02
Model
State the governing relationships, constraints or validated domain knowledge you will retain.
03
Compare
Build mechanistic and data-only baselines before the hybrid model.
04
Validate
Hold out experiments, conditions, assets, sites or regimes at the deployment level.
05
Publish
Report uncertainty, ablation, limitations, data lineage and reproducible code.
Read before you modelDiscuss Your Literature
Selected Publications and Why They Matter
Use this focused reading list to understand the general PIML framework, direct Electronics and Communication Engineering (VLSI Design & Technology) evidence and suitable hybrid modelling methods.
Literature review advice
Do not list papers only. Compare the engineering question, incorporated knowledge, data, split strategy, baselines, uncertainty and evidence level.
This source is included in the Electronics and Communication Engineering (VLSI Design & Technology) literature guide because it demonstrates or reviews a relevant physics-informed, hybrid, inverse, surrogate or scientific-machine-learning approach. Read the methods, data split, baselines and validation evidence—not only the reported accuracy.
How to use this paper: Use this paper to refine the research question, identify a defensible physical prior and compare evidence requirements for Electronics and Communication Engineering (VLSI Design & Technology).
Read publication or record This source is included in the Electronics and Communication Engineering (VLSI Design & Technology) literature guide because it demonstrates or reviews a relevant physics-informed, hybrid, inverse, surrogate or scientific-machine-learning approach. Read the methods, data split, baselines and validation evidence—not only the reported accuracy.
How to use this paper: Use this paper to refine the research question, identify a defensible physical prior and compare evidence requirements for Electronics and Communication Engineering (VLSI Design & Technology).
Read publication or record This source is included in the Electronics and Communication Engineering (VLSI Design & Technology) literature guide because it demonstrates or reviews a relevant physics-informed, hybrid, inverse, surrogate or scientific-machine-learning approach. Read the methods, data split, baselines and validation evidence—not only the reported accuracy.
How to use this paper: Use this paper to refine the research question, identify a defensible physical prior and compare evidence requirements for Electronics and Communication Engineering (VLSI Design & Technology).
Read publication or record This source is included in the Electronics and Communication Engineering (VLSI Design & Technology) literature guide because it demonstrates or reviews a relevant physics-informed, hybrid, inverse, surrogate or scientific-machine-learning approach. Read the methods, data split, baselines and validation evidence—not only the reported accuracy.
How to use this paper: Use this paper to refine the research question, identify a defensible physical prior and compare evidence requirements for Electronics and Communication Engineering (VLSI Design & Technology).
Read publication or record This source is included in the Electronics and Communication Engineering (VLSI Design & Technology) literature guide because it demonstrates or reviews a relevant physics-informed, hybrid, inverse, surrogate or scientific-machine-learning approach. Read the methods, data split, baselines and validation evidence—not only the reported accuracy.
How to use this paper: Use this paper to refine the research question, identify a defensible physical prior and compare evidence requirements for Electronics and Communication Engineering (VLSI Design & Technology).
Read publication or record This source is included in the Electronics and Communication Engineering (VLSI Design & Technology) literature guide because it demonstrates or reviews a relevant physics-informed, hybrid, inverse, surrogate or scientific-machine-learning approach. Read the methods, data split, baselines and validation evidence—not only the reported accuracy.
How to use this paper: Use this paper to refine the research question, identify a defensible physical prior and compare evidence requirements for Electronics and Communication Engineering (VLSI Design & Technology).
Read publication or record Build an interdisciplinary team
Where Electronics and Communication Engineering (VLSI Design & Technology) Can Collaborate
Computer Science
Scientific ML, optimization, trustworthy AI and reproducible research software.
Applied Mathematics
Differential equations, numerical methods, inverse problems and uncertainty.
Sensing & Control
Instrumentation, data acquisition, state estimation and responsible deployment.
Domain Laboratories
Experiments, calibration, validation evidence and practical expertise for Electronics and Communication Engineering (VLSI Design & Technology).
Before you begin
Frequently Asked Research Questions
These answers help students avoid common scope, terminology and validation mistakes.
Still have a question?
Use the biweekly meeting form for research guidance.
Request accessNo. Electronics and Communication Engineering (VLSI Design & Technology) projects may use physics-guided features, hybrid residual models, differentiable simulators, neural operators, constrained architectures or data assimilation. State exactly what knowledge is incorporated.
Choose one engineering question, a measurable output and a defensible mechanistic baseline. Add learning only where data can identify an uncertainty or discrepancy.
A meaningful question, justified prior knowledge, deployment-level holdouts, strong baselines, ablation, uncertainty, reproducibility and honest limitations.
Simulation can broaden coverage, but simulation-only evidence cannot establish real-system accuracy. Use calibrated experiments, field measurements or trusted independent references appropriate to the claim.
Submit the biweekly members meeting form to discuss your project level, branch, data, model, validation plan and possible collaborators.
Take the next step
Bring your Electronics and Communication Engineering (VLSI Design & Technology) research idea to PIMLS
Join the biweekly members meeting for project guidance, collaboration and publication planning—or contact the Society directly.
Meeting participation is requested through the Google form. Complete it carefully so the Society can understand your research interest.